The electrical properties of metal/ferroelectric/insulator/semiconductor (M
FIS) structures with various insulators were investigated. Layers of Si3N4/
SiO2 (NO) formed by thermal oxidation and low pressure chemical vapor depos
ition (LPCVD) and Al2O3 layers deposited by atomic layer deposition (ALD) w
ere used as inter-dielectric layers. SrBi2Ta2O9 (SBT) films used as ferroel
ectric layers were prepared by metal organic decomposition (MOD). The capac
itance-voltage (C-V) curves including the memory window were affected by va
rying the annealing temperature for SET films. Memory windows for MFIS stru
ctures with NO inter-dielectrics in the range of 0.75-1.2 V were maintained
up to annealing temperatures of 900 degrees C. The width of the memory win
dow in C-V curves for MFISs using thin Al2O3 layers decreases with increasi
ng annealing temperature. Therefore, the selection of a good insulator and
parameter control are required for the use of MFIS-ferroelectric random acc
ess memories (FRAMs).