Fabrication of silicon field-emitter arrays by using low-temperature processes

Polycrystalline silicon field-emitter arrays were fabricated using low-temp erature processes, which consisted of isotropic and anisotropic etches. The tips were sharpened using an isotropic dry etch method, which resulted in well-formed emitter tips and a good uniformity. A low-temperature oxide lay er was deposited as a protection layer, which prohibited the diameter of th e tip neck from decreasing during the anisotropic etch and made it easy to remove etch residues. The etch residues were examined by tunneling electron microscopy and energy dispersive X-ray spectroscopy and were removed by a subsequent O-2 ashing process. We obtained a field-emitter array with a tur n-on voltage of 65 V and an anode current of 5 mu A at a gate voltage of 10 0 V.