System-level energy-delay exploration for multimedia applications on embedded cores with hardware cache

Program transformations are a powerful way of optimizing given applications for lower power and higher performance. In this paper, we explore avenues for power reduction by program transformations using the real-time constrai nts. In the sequel, we discuss the effects of our methodology, for optimiza tion of power, on cache related performance aspects. Our target application s are in the real-time multimedia applications domain implemented on progra mmable multimedia or DSP processors. The effectiveness of our approach in o btaining a low power implementation and real-time performance is illustrate d on three real-life applications, viz. a MPEG-2 decoder, a QSDPCM video co dec and a Voicecoder application. Our experimental results indeed show that we are able to obtain lower power and still achieve a real-time performanc e.