Salicidation process for submicrometre gate MOSFET fabrication using a resistless electron beam lithography process

Authors
Michel, S Lavallee, E Beauvais, J Mouine, J
Citation
S. Michel et al., Salicidation process for submicrometre gate MOSFET fabrication using a resistless electron beam lithography process, ELECTR LETT, 35(15), 1999, pp. 1283-1284
Citations number
6
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
35
Issue
15
Year of publication
1999
Pages
1283 - 1284
Database
ISI
SICI code
0013-5194(19990722)35:15<1283:SPFSGM>2.0.ZU;2-B
Abstract
Recently, a novel silicide direct write electron beam lithography (SiDWEL) process has been developed in order to achieve high resolution (50 nm) sili cide structures without the need for any supplementary annealing step. This new lithography technique is used to fabricate N-type MOSFET devices with platinum silicide gates. The fabrication uses a mix and match approach to c ombine the SiDWEL process with conventional MOSFET fabrication techniques.