High data rate switch with amplifier chip

A critical component for high bandwidth communications links is a digital s witch. Desirable features of a digital switch include: high input/output ba ndwidth, high channel count, scalability, low latency and interchannel skew . Superconductive circuits, with simultaneous high speed and low power advant ages (even including the requisite cryocooler) have been applied to a highl y scaleable crossbar switch, useful in supercomputer networks, massively pa rallel processing (MPP), and high data rate telecommunications. We report here on the testing of a 16x16 switch chip based on the switch ch ip component of the highly scaleable crossbar system, We have successfully transmitted multi-Gb/s data through this superconducting switch, with packe t destination addressing decoded from the header of the data packet. The da ta are transmitted to a separate superconducting amplifier chip, mounted on a superconducting multi-chip module (MCM) with the switch. The switch is a crossbar architecture, voltage state design, and operates to beyond 3 Gb/s , The amplifier is a clocked latching stack of Josephson junctions. Output of the amplifier at 6.2 Gb/s is 7.0 mV, which facilitates the interface of the module to its facilitates the interface of the module to its users. BER of the two-chip assembly is 10(-9) or less above 2 Gb/s.