Superconducting delta ADC with on-chip decimation filter.

Last year we presented the first fully operational superconducting Analog-t o-Digital Converter (ADC) with on-chip Digital Signal Processing (DSP). Her e we review this device and introduce completed and prospective innovations required to exceed the performance of the best semiconductor counterparts. The ADC chip contains 2 basic parts: a "fundamental" ADC operating at abou t 20 GHz sampling rate and a digital decimation filter,which attenuates hig h-frequency noise components and reduces the sampling rate to match It with the bandwidth of an input signal. Our short term goal is to achieve 14 bit s Spurious Free Dynamic Range (SFDR) for 60 MHz signal bandwidth by using t he standard 1000 A/cm(2) Nb-trilayer fabrication technology commercially av ailable at HYPRES, Inc.