Manufacturability of superconductor electronics for a petaflops-scale computer

Ultra-low power and ultra-high speed single-flux-quantum electronics is an enabling near-term technology solution for petaflops-scale computers. The p roposed Hybrid Technology Multi-threaded (HTMT) petaflops computer architec ture includes computational modules operating at 100 GHz and an I/O through put of 32 Petabits/s. Due to fundamental time-of-flight and power dissipati on limitations of semiconductor ICs, superconductor ICs at an integration l evel of 100 k gates/cm(2) are proposed for the HTMT computation modules. In this paper, we discuss the manufacturability of superconductor-based compu tation modules, including the IC foundry process, packaging, and data link out of the cryopackage, We focus on the critical technical challenges that exist in each of these areas and present a technology roadmap to achieve th e HTMT IT requirements.