An interface circuit for a Josephson-CMOS hybrid digital system

For broadband data communication between Josephson and CMOS digital systems , amplification of small Josephson-output signals and synchronization betwe en the systems are important issues. We present an interface circuit for a Josephson-CMOS hybrid digital system. The interface circuit consists of a p arallel-in-parallel-out (PIPO) circuit and built-in Josephson-MOS amplifier s. The PIPO circuit, implemented based on 4JL latching logic technology, pe rforms synchronized data transfer between the Josephson and CMOS circuits. The Josephson-MOS amplifiers consists of stacked Josephson junctions (Suzuk i stacks) and MOS inverters which are monolithically integrated on a chip. The circuits have been designed, fabricated and tested. We have successfull y confirmed correct operation of the circuits.