Short-term frequency stability of RSFQ ring oscillators

The temporal stability of the clock signal has a profound effect on the per formance of synchronous RSFQ digital systems. Short-term clock fluctuations , or clock jitter, can severely degrade system performance due to the hazar d of timing constraint violations. Successful large-scale RSFQ digital syst ems will require highly stable multi-Gigahertz on-chip clock sources. To me et this need, methods for characterizing and measuring the short-term stabi lity of such sources are required. In this paper we identify the relevant f igure of merit to characterize and compare various clocks: the cycle-to-cyc le standard deviation of the clock periods. We have developed experimental techniques for the measurement of this figure of merit and applied it to th e characterization of an RSFQ ring oscillator. The experimental results are compared with results from a stochastic circuit simulator. We determined t he value of jitter to be 1.52% at 10GHz.