We are developing an all-digital, high-speed, low-power superconductive mul
ti-hit time digitizer based on a RSFQ time-to-digital converter (TDC). The
advantages of this TDC, as compared to semiconductor TDCs, include excellen
t single, as well as multi-hit time resolution and extremely low power diss
ipation. Each TDC channel consists of a 14-bit superconductive counter base
d on toggle flip-flops with destructive readouts, a 9-word shift register-b
ased FIFO memory, and a parallel-to-serial converter with output driver. To
facilitate external control and data interfacing of the TDC, we have been
developing a VXI-bus interface. Its low-power dissipation allows the TDC to
be directly integrated with cooled front-end detectors, including optical
detectors, eliminating cable bandwidth limitations.