SFQ data processing with set/reset information

We propose a new class of SFQ logic circuits. In this new approach, an SFQ pulse represents the transition between "zero" and "one". By using these tw o bits of information, a one-to-one correspondence between input and output can be realized. Since the correspondence is then the same as in semicondu ctor circuits, this method permits logic design without clock elements. In order to carry out this logic, we propose the most fundamental element, a n ew DC/SFQ converter. A computer simulation and low-speed test were performe d. Both results showed that this converter operates correctly with a wide m argin. Moreover, this converter also pro, ides the basis for many other log ic elements such as AND, OR, and XOR.