High temperature superconducting multilayer multichip module: Fabrication and high speed characterization

Citation
Pm. Anderson et al., High temperature superconducting multilayer multichip module: Fabrication and high speed characterization, IEEE APPL S, 9(2), 1999, pp. 4099-4102
Citations number
6
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Journal title
IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY
ISSN journal
10518223 → ACNP
Volume
9
Issue
2
Year of publication
1999
Part
3
Pages
4099 - 4102
Database
ISI
SICI code
1051-8223(199906)9:2<4099:HTSMMM>2.0.ZU;2-C
Abstract
Superconductivity is attractive for high performance multichip modules (MCM s) for increasing wiring density while eliminating attenuation and dispersi on caused by wiring resistance. However, multilayer HTS structures have bee n difficult to fabricate. A methodology and materials set was developed to fabricate a multilayer structure with superconducting traces in the X-Y pla nes and normal metal interconnects in the Z-plane. A simple, multilayer cir cuit was designed to characterize the high-speed digital waveform character istics and pulse integrity. Design guidelines were employed to maintain con stant impedance through multiple transmission lines. The circuit was modele d on a 3D simulator with a one nanosecond rise-time pulse. The goal was to correlate the modeled and measured data with respect to the pulse integrity and impedance. Eye diagrams were produced using a one-gigahertz pulse trai n. In addition, thermal cycling was performed on the structures to identify if any thermal expansion mismatches occurred. Electrical tests were perfor med before and after the cycling to verify circuit integrity. The data from the thermal cycling will be discussed.