Effective exploitation of a Zero Overhead Loop Buffer

A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is comm only found in DSP processors. This buffer can be viewed as a compiler manag ed cache that contains a sequence of instructions that will be executed a s pecified number of times. Unlike techniques such as loop unrolling, a loop buffer is a hardware technique that can be used to minimize loop overhead w ithout the penalty of increasing code size. In addition, a ZOLB also requir es relatively little space and power, which are both important consideratio ns for most DSP applications. This paper describes strategies for generatin g code to effectively use a ZOLB. The authors have found that many common i mproving transformations used by optimizing compilers to improve code on co nventional architectures are shown (1) to allow more loops to be placed in a ZOLB and (2) to further reduce loop overhead of the loops placed in a ZOL B. The results given in this paper demonstrate that this architectural feat ure can often be exploited with substantial improvements in execution time and slight reductions in code size.