Impact of plasma-enhanced chemical vapor deposited oxide characteristics on interconnect via resistance and device performance of four-transistor static random access memory with polysilicon load resistors

Citation
Cf. Lin et al., Impact of plasma-enhanced chemical vapor deposited oxide characteristics on interconnect via resistance and device performance of four-transistor static random access memory with polysilicon load resistors, J VAC SCI B, 17(4), 1999, pp. 1456-1463
Citations number
23
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Material Science & Engineering
Journal title
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B
ISSN journal
10711023 → ACNP
Volume
17
Issue
4
Year of publication
1999
Pages
1456 - 1463
Database
ISI
SICI code
1071-1023(199907/08)17:4<1456:IOPCVD>2.0.ZU;2-Z
Abstract
By varying the gas ratio during the process of plasma-enhanced chemical vap or deposited (PECVD) SiOx, the composition of the oxide used as the interme tal dielectric (IMD) in the device is modified, and its impact on the integ rity of the interconnect metal via hole and the stability of four-transisto r (4-T) static random access memory (SRAM) with poly-Si load resistors is i nvestigated. PECVD oxides using precursors of SiH4 and N2O under various ga s ratios are adopted to manipulate the Si:O atomic ratio and other dielectr ic characteristics. An increase in the Si atomic percent in IMD film would induce a higher via resistance. Cross-sectional scanning electron microscop y of the postetching via holes in a Si-rich IMD sample reveals a high amoun t of plasma-induced polymer formation around the via holes, which is percei ved as the root cause of the dimensional decrease in via hole size and a co rresponding increase in via resistance. As the gas ratio of SiH4/N2O increa ses, the IMD films become more Si rich with a higher refractive index and a n a-Si-like dangling bond (. Si=Si-3) density. The a-Si-like dangling bonds (. Si=Si-3) in IMD films serve as effective trapping centers for hydrogen or moisture above the second polysilicon load resistor and hence protect th em from attack by back-end process-induced mobile charges. The resistance o f these poly-Si load resistors is maintained at a high level and device per formance is secured. Thus, the high quality of a 4-T SRAM device with stabl e load resistance, could be realized, while maintaining a low interconnect metal via resistance. (C) 1999 American Vacuum Society. [S0734-211X(99)0640 4-5].