Bipolar transistor epilayer design using the MAIDS mixed-level simulator

In this paper, we address the epilayer design of the bipolar transistor usi ng the one-dimensional (1D) mixed-level simulator MAIDS (microwave active i ntegral device simulator), MAIDS facilitates simulation of the electrical b ehavior of bipolar (hetero) junction transistors with various doping profil es and under different signal conditions in a realistic circuit environment , MAIDS as implemented within Hewlett Packard's microwave design system is a useful and promising tool in the development of bipolar transistors for l arge-signal conditions, Using MAIDS, we have identified th dominant bipolar transistor distortion sources with respect to the biasing conditions, Simu lation results are compared with small- and large-signal measurements for t he BFQ135 transistor, which has been developed for cable television (CATV) applications. By analyzing the measured and simulated data, we have develop ed an optimum epilayer design map for third-order intermodulation distortio n that has proven to be particularly useful in the epilayer dimensioning of transistors for CATV applications.