ErrorTracer: Design error diagnosis based on fault simulation techniques

This paper addresses the problem of locating error sources in an erroneous combinational or sequential circuit. We use a fault simulation-based techni que to approximate each internal signal's correcting power. The correcting power of a particular signal is measured in terms of the signal's correctab le set, namely, the maximum set of erroneous input vectors or sequences tha t can be corrected by resynthesizing the signal. Only the signals that can correct every given erroneous input vector or sequence are considered as a potential error source. Our algorithm offers three major advantages over ex isting methods. First, unlike symbolic approaches, it is applicable for lar ge circuits, Second, it delivers more accurate results than other simulatio n-based approaches because it is based on a more stringent condition for id entifying potential error sources. Third, it can be generalized to identify multiple errors theoretically. Experimental results on diagnosing combinat ional and sequential circuits with one and two random errors are presented to show the effectiveness and efficiency of this nem approach.