We address the problem of rectifying an erroneous combinational circuit. Ba
sed on the symbolic binary decision diagram techniques, we consider the rec
tification process as a sequence of partial corrections, Each partial corre
ction reduces the size of the input vector set that produces error response
s. Compared with the existing approaches, this approach is more general, an
d thus, suitable for circuits with multiple errors and for the engineering
change problem, Also, we derive the necessary and sufficient condition of g
eneral single-gate correction to improve the quality of rectification. To h
andle larger circuits, we develop a hybrid approach that makes use of the i
nformation of structural correspondence between specification and implement
ation. Experiments are performed on a suite of industrial examples as well
as the entire set of ISCAS'85 benchmark circuits to demonstrate its effecti
veness.