Effects of Bi-Pt alloy on electrical characteristics of Pt/SrBi2Ta2O9/CeO2/Si ferroelectric gate structure

Interface morphology and electrical properties of Pt/SrBi2Ta2O9(SBT)/CeO2/S i ferroelectric gate structure are characterized by considering the interac tions among Bi, O, and Pt atoms during annealing process. It is found that the interfacial roughness of the Pt/SBT might be reduced during the anneali ng at 800 degrees C because the bottom side of the Pt electrode reacts with Bi atoms outdiffused from the SBT and the Bi-Pt alloys are molten at 765 d egrees C, and the metallic Bi atoms are consumed by forming Bi oxide. Addit ionally, the capacitance and memory window of the ferroelectric gate struct ure annealed at 800 degrees C decrease to 69% and 80% of those values of th e as-deposited gate structure, respectively, due to the additional capacita nce and the voltage drop at the low dielectric Bi-oxide capacitor. In contr ast, the leakage current characteristics are improved by two orders of magn itude after annealing at 800 degrees C for 30 min. (C) 1999 American Instit ute of Physics. [S0021-8979(99)00418-1].