LIMIT TO THE BIT-RATE CAPACITY OF ELECTRICAL INTERCONNECTS FROM THE ASPECT RATIO OF THE SYSTEM ARCHITECTURE

Citation
Dab. Miller et Hm. Ozaktas, LIMIT TO THE BIT-RATE CAPACITY OF ELECTRICAL INTERCONNECTS FROM THE ASPECT RATIO OF THE SYSTEM ARCHITECTURE, Journal of parallel and distributed computing, 41(1), 1997, pp. 42-52
Citations number
25
Categorie Soggetti
Computer Sciences","Computer Science Theory & Methods
ISSN journal
07437315
Volume
41
Issue
1
Year of publication
1997
Pages
42 - 52
Database
ISI
SICI code
0743-7315(1997)41:1<42:LTTBCO>2.0.ZU;2-I
Abstract
We show that there is a limit to the total number of bits per second, B, of information that can flow in a simple digital electrical interco nnection that is set only by the ratio of the length I of the intercon nection to the total cross-sectional dimension root A of the interconn ect wiring-the ''aspect ratio'' of the interconnection. This limit is largely independent of the details of the design of the electrical lin es, The limit is approximately B similar to B(o)A/l(2) bits/s, with B- o similar to 10(15) (bit/s) for high-performance strip lines and cable s, similar to 10(16) for small on-chip lines, and similar to 10(17)-10 (18) for equalized lines, Because the limit is scale-invariant, neithe r growing nor shrinking the system substantially changes the limit, Ex ceeding this Limit requires techniques such as repeatering, coding, an d multilevel modulation. Such a limit will become a problem as machine s approach Tb/s information bandwidths. The limit mill particularly af fect architectures in which one processor must talk reasonably directl y with many others. We argue that optical interconnects can solve this problem since they avoid the resistive loss physics that gives this l imit. (C) 1997 Academic Press.