Analog integrated circuits for the Lotka-Volterra competitive neural networks

A subthreshold MOS integrated circuit (IC) is designed and fabricated for i mplementing a competitive neural network of the Lotka-Volterra (LV) type wh ich is derived from conventional membrane dynamics of neurons and is used f or the selection of external inputs, The steady-state solutions to the LV e quation can be classified into three types, each of which represents qualit atively different selection behavior. Among the solutions, the winners-shar e-all (WSA) solution in which a certain number of neurons remain activated in steady states is particularly useful owing to robustness in the selectio n of inputs from a noisy environment. The measured results of the fabricate d LV IC's agree well with the theoretical prediction as long as the influen ce of device mismatches is small. Furthermore, results of extensive circuit simulations prove that the large-scale LV circuit producing the WSA soluti on does exhibit a reliable selection compared with winner-take-ah circuits, in the possible presence of device mismatches.