Wafer level backside emission microscopy: dynamics and effects

Emission microscopes have been widely adopted as an important tool for anal yzing failures in integrated circuits from the front surface. More recently , the development of multilevel metallization, flip chip and lead-on-chip p ackage design has eliminated or greatly restricted this avenue of inspectio n. Inspection from the backside of semiconductors is an obvious alternative . However, this inspection is complicated by a 'silicon filter effect' stro ngly tied to the silicon doping level. To address this effect, a wafer thin ning and polishing technique is used, as a companion paper describes. This paper first explores the relation of optical absorption characteristics of silicon to its carrier concentration and the remaining thickness. It will b e shown that the wafer needs to be thinned to below 150 mu m for heavily do ped substrate. Next, the deflection and bending stress on the thinned wafer induced by the application of microprobing are calculated. The maximum num ber of probe pins allowed under different thinning conditions is quantified , leading to the conclusion that the traditional tungsten probe pins are to be replaced by those that product lower probing force. A beryllium-copper, wire-based, Ultra-Low Force (ULF) probe card providing an acceptable alter native is shown. (C) 1999 Elsevier Science Ltd. All rights reserved.