A physically based analytic model of EET Class-E power amplifiers - Designing for maximum PAE

In this paper, we present a new Class-E power-amplifier model, Through a ph ysically based analysis, our novel approach yields closed-form expressions for input, output, and de power. These expressions yield the important figu res-of-merit gain, drain efficiency, and power-added efficiency (PAE)I. Usi ng standard device parameters, design optimization for maximum PAE follows directly from the analysis and applies to both integrated and discrete tran sistor implementations, For integrated designs, the optimal FET aspect rati o can be determined, given the design variables of the Class-E output netwo rk (output power, frequency, supply voltage, and loaded-Q of the output res onator). In a discrete transistor application, the Class-E network can be o ptimized for one of the design variables, The detrimental effects of the de vice parasitics on the amplifier's performance at UHF and microwave frequen cies are accounted for in the model and explained in this paper. We verifie d the validity of the model by comparing our computed values against those from simulations using an optimized 0.5-mu m CMOS level-3 SPICE model.