Silicon-germanium heterostructures have introduced the: opportunity to engi
neer the energy gap of Si, leading to a wide range of microelectronics devi
ce applications. During epitaxial layer growth as well as technology proces
s steps, structural defects may appear or be enhanced affecting device perf
ormances. We have studied the as grown potential defects before and after t
hermal treatments and ion implantation used in a BiCMOS technology under de
velopment. Preliminary results show a clear correlation between structural
defects such as misfit dislocations in the commensurate layers and the junc
tion leakage current in the final Heterojunction Bipolar Transistor (HBT).
These results allow us to optimize the growth parameters in order to have a
wider process window and a better process yield.