Switched capacitor arrays analog memory for sparse data sampling

Citation
S. Panebianco et al., Switched capacitor arrays analog memory for sparse data sampling, NUCL INST A, 434(2-3), 1999, pp. 424-434
Citations number
19
Categorie Soggetti
Spectroscopy /Instrumentation/Analytical Sciences","Instrumentation & Measurement
Journal title
NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT
ISSN journal
01689002 → ACNP
Volume
434
Issue
2-3
Year of publication
1999
Pages
424 - 434
Database
ISI
SICI code
0168-9002(19990921)434:2-3<424:SCAAMF>2.0.ZU;2-G
Abstract
We present the design and the test performed on ADeLinel, a Full-Custom Ana log Memory for sparse data sampling. It has been designed as an array of sw itched capacitors. It is only one channel of 8 cells. The control part of t he ADeLine chip is custom designed for the size reduction, high speed perfo rmance and low power dissipation. The memory has been integrated in double poly, double metal AMS 0.8 mu m CMOS. It has 3.5 V input and output swings, a linearity within +/- 6 mV in a 2 V range and 11 bits of resolution. (C) 1999 Elsevier Science B.V. All rights reserved.