The superthreaded processor architecture

The common single-threaded execution model limits processors to exploiting only the relatively small amount of instruction-level parallelism available in application programs. The superthreaded processor, on the other hand, i s a concurrent multithreaded architecture (CMA) that can exploit the multip le granularities of parallelism available in general-purpose application pr ograms. Unlike other CMAs that rely primarily on hardware for run-time depe ndence detection and speculation, the superthreaded processor combines comp iler-directed thread-level speculation of control and data dependences with run-time data dependence verification hardware. This hybrid of a superscal ar processor and a multiprocessor-on-a-chip can utilize many of the existin g compiler techniques used in traditional parallelizing compilers developed for multiprocessors. Additional unique compiler techniques, such as the co nversion of data speculation into control speculation, are also introduced to generate the superthreaded code and to enhance the parallelism between t hreads. A detailed execution-driven simulator is used to evaluate the perfo rmance potential of this new architecture. It is found that a superthreaded processor can achieve good performance on complex application programs thr ough this close coupling of compile-time and run-time information.