A LOG-EXP still image compression chip design

In this paper, a fully pipelined single chip is proposed for the LOG-EXP st ill image compression. The design of the LOG-EXP image compression system f ocus on the high compression ratio of the complex texture (e.g. benchmark i mage baboon) and high quality image, especially for the PSNR requirement ab ove 36. In comparison with the JPEG compression result (bpp = 0.99 and PSNR = 26.9), this compression algorithm uses less bpp (bpp = 0.87) to get high er image quality (PSNR = 36.38) for the benchmark image baboon. The entire LOG-EXP image compression system can be implemented on a single chip to yie ld a clock rate of 175 MHz which allow an input rate of 30 frames per secon d for 1024 x 1024 color images.