Design and analysis of resonant-tunneling-diode (RTD) based high performance memory system

A resonant-tunneling-diode (RTD) based sense amplifier circuit design has b een proposed for the first time to envision a very high-speed and low-power memory system that also includes refresh-free, compact RTD-based memory ce lls. By combining RTDs with n-type transistors of conventional complementar y metal oxide semiconductor (CMOS) devices, a new quantum MOS (Q-MOS) famil y of logic circuits, having very low power-delay product and good noise imm unity, has recently been developed. This paper introduces the design and an alysis of a new QMOS sense amplifier circuit, consisting of a pair of RTDs as pull-up loads in conjunction with n-type pull-down transistors. The prop osed QMOS sensing circuit exhibits nearly 20% faster sensing time in compar ison to the conventional design of a CMOS sense amplifier. The stability an alysis done using phase-plot diagram reveals that the pair of back-to-back connected static QMOS inverters! which forms the core of the sense amplifie r, has meta-stable and unstable states which are closely related to the I-V characteristics of the RTDs. The paper also analyzes in details the refres h-free memory cell design, known as tunneling static random access memory ( TSRAM). The innovative cell design adds a stack of two RTDs to the conventi onal one-transistor dynamic RAM (DRAM) cell and thereby the cell can indefi nitely hold its charge level without any further periodic refreshing. The a nalysis indicates that the TSRAM cell can achieve about two orders of magni tude lower stand-by power than a conventional DRAM cell. The paper demonstr ates that RTD-based circuits hold high promises and are likely to be the ke y candidates for the future high-density, high-performance and low-power me mory systems.