FLIP-chip and "backside" techniques

Citation
Dl. Barton et al., FLIP-chip and "backside" techniques, MICROEL REL, 39(6-7), 1999, pp. 721-730
Citations number
42
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONICS RELIABILITY
ISSN journal
00262714 → ACNP
Volume
39
Issue
6-7
Year of publication
1999
Pages
721 - 730
Database
ISI
SICI code
0026-2714(199906/07)39:6-7<721:FA"T>2.0.ZU;2-U
Abstract
State-of-the-art techniques for failure localization and design modificatio n through bulk silicon are essential for multi-level metallization and new, flip chip packaging methods. The tutorial reviews the transmission of ligh t through silicon, sample preparation, and backside defect localization tec hniques that are both currently available and under development. The techni ques covered include emission microscopy, scanning laser microscope based t echniques (electrooptic techniques, LIVA and its derivatives), and other no n-IR based tools (FIB, e-beam techniques, etc.). (C) 1999 Elsevier Science Ltd. All rights reserved.