Reliability improvement of EEPROM by using WSi2 polycide gate

Recent technology fabrication of EEPROM developed by STMicroelectronics inv olves tungsten-based polycide for the gate of the transistors. The EEPROM d esign is based on one floating gate. The main objective was to increase the data retention capability on product using this polycide, and this after c ycling. Thus, we have set up a new process called integrated process involv ing a cluster tool which avoids any contamination during the manufacturing of the polycide stacked layers in comparison with the standard process. In addition, the tungsten chemistry induces an insertion of fluorine in the tu nnel oxide. The presence of the fluorine is verified and can explain the mo dification of the threshold voltages and the evolution of the programming w indow. Analyses of test cells and product vehicles were made. This new proc ess improves the data retention capability of the EEPROM after one million cycles, and also decreases the cumulative percentage of defects; these resu lts were good enough to insert this process in the production line. (C) 199 9 Elsevier Science Ltd. All rights reserved.