Novel HEMT processing technologies and their circuit applications

Citation
I. Adesida et al., Novel HEMT processing technologies and their circuit applications, SOL ST ELEC, 43(8), 1999, pp. 1333-1338
Citations number
10
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Eletrical & Eletronics Engineeing
Journal title
SOLID-STATE ELECTRONICS
ISSN journal
00381101 → ACNP
Volume
43
Issue
8
Year of publication
1999
Pages
1333 - 1338
Database
ISI
SICI code
0038-1101(199908)43:8<1333:NHPTAT>2.0.ZU;2-F
Abstract
The monolithic integration of enhancement- and depletion-mode high-electron mobility transistors (E- and D-HEMTs) suitable for high-speed and low powe r circuit applications in the lattice-matched InP material system is examin ed. E-HEMT devices with gate-lengths of 0.25, 0.5 and 1.0 mu m fabricated u sing a buried-Pt gate process demonstrate threshold voltages (V-T) ranging from +200 to +258 mV and maximum extrinsic transconductances (g(mext)) as h igh as 800 mS mm(-1), while D-HEMT devices of identical gate-lengths exhibi ted a VT ranging from -599 to -405 mV, and a g(mext) as high as 578 mS mm(- 1). The devices showed excellent rf characteristics, exhibiting unity curre nt-gain cutoff frequencies (f(t)) as high as 106 GHz. Based on these result s, 11, 23, and 59 stage ring oscillators using direct-coupled FET logic (DC FL) technology were fabricated and characterized. Room temperature propagat ion delays of 9.27 ps/stage with a power-delay product of 2.37 fJ/stage wer e achieved. (C) 1999 Elsevier Science Ltd. All rights reserved.