FACE: Fine-tuned architecture codesign environment for ASIP development

High-performance, reliable, and robust products with a short development sc hedule are general design aims. FACE was developed to achieve these goals, including the organization of a design flow, a frequency-driven information analyzer, compiler techniques (code generator and instruction optimization ), and a hierarchical object design library. This paper explores the design space of a retargetable compiler and a reconfigurable hardware, which comb ine both software and hardware reprogrammability. The environment, FACE, we have developed allows us to quickly move the functions between software an d hardware in a state of flux. Finally, it generates the application specif ic integrated processor (ASIP) and a compiler for the new ASIP architecture . The case study is considered which demonstrates the efficiency in ASIP de sign of FACE.