In this paper, a novel implementation to obtain the triggering pulses for t
hyristorized ac/dc power converters is presented. The system developed is a
variant of the digital ramp-and-threshold strategy employing parallel hard
ware calculation. In order to reduce the number of components otherwise inv
olved, innovative ideas that make feasible the use of only one low-cost fie
ld-programmable gate array as the digital core, have been introduced. Based
on the proposed topology, a compact high-resolution optimum-speed thyristo
r gate control circuit is achieved. The resulting system is very flexible a
nd can be easily configured to drive series- or parallel-connected multiple
-pulse controlled rectifiers. Practical results are provided.