A design approach for analog neuro/fuzzy systems in CMOS digital technologies

This paper presents adaptive circuit blocks and related learning algorithms to design neuro/fuzzy inference systems using analog integrated circuits i n CMOS, standard VLSI technologies. The proposed circuit building blocks ar e arranged in an architecture composed of five layers: fuzzification, T-nor m, normalization, consequent, and output. Inference is performed using Taka gi and Sugeno's if-then rules, particularly where the rule's output only co ntains a constant term - a singleton. The proposed learning scheme uses wei ght perturbation for the fuzzification layer and outstar for the output lay er. A three-input, four-rule controller has been designed for demonstration purposes in 1.6 mu m CMOS single-poly, double-metal technology, and obtain s operation speed in the range of 5 MFlips with around 1% systematic errors . (C) 1999 Elsevier Science Ltd. All rights reserved.