Analog LSI implementation of self-learning neural networks

This paper describes a circuit architecture and analog memory devices suita ble for analog neural LSIs with on-chip learning capability. First, the ess ential performances of analog and digital LSI implementations are compared semi-quantitatively and it is derived that the analog approach is more than several thousands times faster than the digital one for feedback networks. Next, a general analog LSI architecture implementing backpropagation netwo rks, Hopfield networks and deterministic Boltzmann machines is proposed and tested using a prototype LSI with 18 neuron I/Os and 81 synapses. Finally, a practical high-speed, high-resolution and non-volatile analog weight mem ory circuit is proposed and tested. The weight can be updated with more tha n 14 bit resolution in 1 MHz and is backuped to a non-volatile memory with 6 bit precision. (C) 1999 Elsevier Science Ltd. All rights reserved.