Response of head suspension interconnect at 1 GHz

The results of PSPICE simulations of suspension interconnects connecting ul tra-fast write drivers to a write head capable of 1 GHz electronic reversal time are reported. The suspension interconnect is modeled as a distributed lumped circuit with parameters obtained from FEM-based simulations and inc lude the effects of eddy currents. An ideal write-current driver in paralle l with a capacitor and a damping resistor are assumed. Studies of the flux rise-time and flux pulse-shape are made varying the driver impedances and t he geometries of the interconnects. Rise-times as low as Ins are demonstrat ed which correspond to the isolated head capability at 60ma. Implications w ith respect to interconnect design are discussed.