A generalized HSPICE (TM) macro-model for pinned spin-dependent-tunneling devices

This work presents the first generalized circuit macro-model for a pinned S pin-Dependent-Tunneling (SDT) device. The macro-model is realized as a four terminal subcircuit which emulates SDT device behavior over a wide range o f sense and word line currents. This model accurately represents the nonlin ear and hysteretic nature of an SDT device and HSPICE(TM) simulations of me mory circuits using this model show expected outcomes. The model is flexibl e and relatively simple: ranges of the write /read currents and device resi stance values are incorporated as parameterized variables and no semiconduc tor devices are used within the model.