Selective hemispherical grained polysilicon transformation for 256 MB, 1 GB dynamic random access memory and beyond

Application of an ultrahigh vacuum vertical batch reactor for selective che mical vapor deposition of hemispherical grain (HSG) polysilicon on planar a nd three-dimensional crown capacitor storage nodes is investigated. Compari son between selective MSG and other nonselective alternatives is drawn. An optimum pre-MSG clean chemistry (with 60 Angstrom overall oxide etch), suit able for 256 MB and 1 GB application, for both multi- and single tank wafer clean modules is recommended. This clean method maintains the integrity of the starring a-Si (>5% of the original a-Si thickness) prior to HSG transf ormation. Contamination issues related to the tool, preclean module, and th e processing ambient are explored. Factors impacting within wafer and wafer -to-wafer reflectance and capacitance uniformity and the effect of particle s and crystallization defects on HSG transformation are evaluated. Defect f ormation mechanisms and ways of minimizing defect density are also included . Effects of critical processing parameters on MSG grain characteristics in order to obtain maximum area enhancement factor and highest C-min/C-max ra tio for high density application (256 MB, 1 GB, and beyond) is explored in depth. Post-MSG gas phase doping (800 degrees C for 300 s) to achieve a C-m in/C-max ratio of >0.95 and its effect on surface roughness of HSG transfor med a-Si film is investigated. (C) 1999 The Electrochemical Society. S0013- 4651(99)02-072-8. All rights reserved.