Dependence of the performance and reliability of n-metal-oxide-silicon field effect transistors on interlayer dielectric processing

This article reports on the impact of interlayer dielectric (ILD) depositio n and processing on the characteristics and reliability of n-channel metal- oxide-silicon held-effect transistors (n-MOSFETs). The TLD materials used w ere silicon dioxide prepared from tetra-ethyl-ortho-silane, fluorinated sil icon oxides (FSOs), and low-kappa polymers. The ILDs were deposited by mean s of plasma enhanced chemical vapor deposition (PECVD), PECVD and high dens ity plasma (HDP), and spin coating, respectively. The devices with 90 Angst rom gate oxide and 0.35 mu m channel lengths were sensitive to poly-Si gate definition etching steps with antenna ratio 5 and 70 K. To assess the degr ee of degradation, charge pumping (CP), gate-oxide integrity as well as tra nsistor's parameters were measured after Fowler-Norheim (FN) stressing. It is found out that PECVD deposition of FSO resulted in the highest degradati on to the MOSFETs, whereas spinning-on and processing polymer ILD yielded t he best performing and the most reliable MOSFETs. It is also found that dev ice degradation in wafers with FSO as ILD depends on the deposition method of FSO, and that this degradation bears a reverse charging-antenna correlat ion. It is argued that this correlation is caused by the interaction betwee n fluorine and plasma-charging damage. (C) 1999 American Vacuum Society.