Fully-depleted SOICMOS technology for low-voltage low-power mixed digital/analog/microwave circuits

This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers unique opportunities in the field of low-voltage, low-po wer CMOS circuits. Beside the well-known reduction of parasitic capacitance s due to dielectric isolation, FD SOI MOSFETs indeed exhibit near-ideal bod y factor, subthreshold slope and current drive. These assets are both theor etically and experimentally investigated. Original circuit studies then sho w how a basic FD SOI CMOS process allows for the mixed fabrication and oper ation under low supply voltage of analog, digital and microwave components with properties significantly superior to those obtained on bulk CMOS. Expe rimental circuit realizations support the analysis.