The dynamic and short-circuit power consumption of a complementary metal-ox
ide-semidconductor (CMOS) gate driving an inductance-capacitance (LC) trans
mission line as a limiting case of an RLC transmission line is investigated
in this paper. Closed-form solutions for the output voltage and short-circ
uit power of a CMOS gate driving an LC transmission line are presented. A c
losed form solution for the short-circuit power is also presented. These so
lutions agree with circuit simulations within 11% error for a wide range of
transistor widths and line impedances for a 0.25-mu m CMOS technology. The
ratio of the short circuit to dynamic power is shown to be less than 7% fo
r CMOS gates driving LC transmission lines where the line is matched or und
erdriven, The total power consumption is expected to decrease as inductance
effects becomes more significant as compared to a resistance-capacitance (
RC)-dominated interconnect line.