Parasitic bipolar gain reduction and the optimization of 0.25-mu m partially depleted SOI MOSFET's

An in-depth analysis of the role of parasitic bipolar gain reduction in 0.2 5-mu m partially depleted SOI MOSFET'S is presented, considering both de ch aracteristics as well as circuit operation. The effect of channel doping, s ilicide proximity, and germanium implantation on the lateral bipolar gain a re characterized for optimal performance and manufacturability. Channel dop ing has the expected impact on bipolar gain, Silicide proximity is shown al so to have a large impact. Germanium implantation into the source/drain reg ions reduces the lateral. bipolar gain due to the introduction of defects t hat act as recombination centers in the source, reducing emitter efficiency . Further, germanium implantation serves to finely control the silicidation process, leading to good manufacturing control of the lateral silicide enc roachment. Analysis of MOSFET de I-V characteristics shows that threshold v oltages for SOI have to be set only 30-50 mV higher for comparable de off c urrent to bulk CMOS. Finally, the impact of bipolar gain on floating-body-i nduced hysteretic effects and on alpha-particle-induced SRAM soft error rat es are described.