The incorporation of C into strained Si1-xGex to form partially compensated
Si1-x-yGexCy layers improve their critical thickness and thermal stability
against relaxation. Thus, these ternary alloys are attractive for the real
ization of MOS-gated HFETs with the gate grown by thermal oxidation. For th
is purpose, we present a detailed study of the growth kinetics of SiO2 in t
he thin oxide regime for tensile and compressive layers. The oxides have be
en analyzed by FTIR. The modification of the Si1-x-yGexCy layers after oxid
ation has been studied by FTIR (substitutional carbon, beta-SiC precipitati
on) and SIMS (Ge and C depth profiles). From these analyses, suitable proce
ss windows for dry thermal growth of oxides with good quality are defined.
Preliminary results of the electrical characterization performed on test ca
pacitors are shown.