Modeling the trends in valence-band electron tunneling in NMOSFETs with ultrathin SiO2 and SiO2/Ta2O5 dielectrics with oxide scaling

Gate oxide scaling in NMOSFETs causes electrons to tunnel from the conducti on and valence bands of the silicon substrate in the direct-tunneling regim e. In NMOSFETs, the tunneling of electrons from the substrate's valence ban d is a source of the substrate current I-B and contributes to the gate curr ent I-G. Oxide thickness scaling leads to an increase in the substrate curr ent I-B and in the ratio I-B/I-G of substrate to gate current. In this pape r, we report the trends in the I-B/I-G ratio due to oxide thickness scaling in ultrathin SiO2 and SiO2/Ta2O5 composite gate dielectrics.