Citation
Sh. Chang et al., 25.6Gbit/s horizontally and vertically accessible embedded multiport SRAM, ELECTR LETT, 35(21), 1999, pp. 1823-1825
Citations number
5
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194
→ ACNP
Volume
35
Issue
21
Year of publication
1999
Pages
1823 - 1825
Database
ISI
SICI code
0013-5194(19991014)35:21<1823:2HAVAE>2.0.ZU;2-E
Abstract
An architecture for an embedded 8-port SRAM with 256 bit simultaneous horiz
ontal and vertical data access for adjacent or alternate addresses is propo
sed. This architecture makes possible four kinds of address configurations
which are effective in video applications by selecting multiple word lines
and one of four bit lines for each column multiplexer. The proposed SRAM pr
ovides 25.6 Gbit/s of high bandwidth.