Memory reduction for HDTV decoders

In this paper, we propose a low-cost memory reduction scheme which can redu ce the memory requirement for full HDTV decoding from 12 MB to 4 MB. This s cheme uses a switchable architecture that allows HDTV decoding with scalabl e memory reduction ratios. Depending on the input format and the amount of available memory, the scheme performs 1/4 or 1/2 memory reduction or no mem ory reduction. The 1/2 memory reduction is achieved by performing a block-b ased Hadamard transform followed by appropriate scalar quantization. The Ha damard transform has good signal energy compaction and a low computational cost. Appropriately designed nonuniform scalar quantizers take advantage of the statistics of the Hadamard transform coefficients and compress the dat a to match the 1/2 memory reduction target. The 1/4 memory reduction is ach ieved by 1/2 horizontal decimation followed by the 1/2 memory reduction sch eme. Experimental results show that the proposed memory reduction schemes a chieve good performance at very low computational cost, which makes them Ve ry attractive for digital TV applications.