A 0.25-mu m 600-MHz, 1.5-V, fully depleted SOICMOS 64-bit microprocessor

A 0.25-mu m, four-layer-metal, 1.5-V, 600-MHz, fully depleted (FD) silicon- on-insulator (SOI) CMOS 64-bit ALPHA1 microprocessor integrating 9.66 milli on transistors on a 209-mm(2) silicon die has been developed leveraging the existing bulk design. FD-SOI technology is used because it has better immu nity for dynamic leakage current than partially depleted SOI in highspeed d ynamic circuits without body contact. C-V characteristics of metal-oxide-si licon-oxide-silicon with and without source-drain junctions are described t o explain the behavior of FD-SOI transistor. Race, speed, and dynamic stabi lity have been simulated to reassure the circuit operation. Key process fea tures are shallow trench isolation, 4-nm gate oxide, 30-nm co-silicide, 46- nm silicon him, and 200-nm buried oxide. The FD-SOT microprocessor runs 30% faster than that of bulk, and it passes the reliability and system test.