Behavioral model of reusable D/A converters

In the context of the Virtual Socket Interface system on a chip interface f or embedded blocks, a behavioral model of a digital-to-analog converter is presented. A generic model, which is used for high-level design exploration , as well as an extracted model after synthesis, are presented. Both static (integral nonlinearity, differential nonlinearity) and dynamic behavior (g litch behavior, settling time) are modeled accurately; Power and area estim ators are derived as well. The model results in efficient system simulation s.