A fully on-chip current controlled open-drain output: driver using a bandga
p reference current generator was designed for:high bandwidth DRAMs. It red
uces the overhead of receiving a digital code from an external source for t
he compensation of the temperature and supply voltage variations. The corre
ct value of the current control register is updated at the end of every aut
o refresh cycle. The operation at the data rate up to 0.8 Gb/s was verified
by SPICE simulation using a 0.22 mu m triple-well CMOS technology.