Parallel test structure in latch based asynchronous pipeline

Authors
Yang, JL Choy, CS Chan, CF
Citation
Jl. Yang et al., Parallel test structure in latch based asynchronous pipeline, IEICE T FUN, E82A(11), 1999, pp. 2527-2529
Citations number
3
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES
ISSN journal
09168508 → ACNP
Volume
E82A
Issue
11
Year of publication
1999
Pages
2527 - 2529
Database
ISI
SICI code
0916-8508(199911)E82A:11<2527:PTSILB>2.0.ZU;2-E
Abstract
Detecting the stuck-at-pass faults in the event-driven latches is the main difficult in testing latch based asynchronous pipeline. In this paper we pr oposed a parallel test structure to ease this problem.