A computational engine for multirate FIR digital filtering

Digital filtering is a key computation in digital signal processing (DSP) a pplications. There exist a wide variety of high-performance portable system s that rely on embedded DSP systems to varying degrees. It is therefore nec essary that such systems are both versatile and power efficient. In this pa per, we propose a computational engine (CE) to serve as an ASIP implementin g compute-intensive/power-critical multirate finite-impulse-response (FIR) digital filtering algorithms in embedded systems. The CE is programmable an d comprises of data path and control path. Control sequences necessary to r ealize a particular filter operation can be programmed onto the control pat h of the CE. The versatality and efficacy of the proposed CE is demonstrate d in this paper. (C) 1999 Elsevier Science B.V. All rights reserved.